Molecule_RP2350B_RM2_v1 — Hardware Reference

RP2350B + CYW43439 (Raspberry Pi RM2) castellated molecule. This is the board fw_stationary and fw_arm target.

• Source: adom-inc/adom-molecules — imported here on 2026-04-17
• KiCad project name: Molecule_RP2350B_RM2_v1 (internal board name in .kicad_pro: Molecule RP2350B RM2 W v1.0)
• Wiki page: molecules/molecule-rp2350b-rm2-v1-106000 — currently a stub (auto-imported 2025-10-10, no pin map or BOM detail)
• Supersedes: the older hardware/pico2-2w-molecule-v20/ folder (wrong board). That folder should be removed once firmware is confirmed building against this one.
• PCB: 4-layer (inferred from kicad_pcb stackup settings), USB Micro-B connector, 62 perimeter machine-pin contacts + 4 mounting pins
• MCU: RP2350B in QFN-80 (U1). Not the Pico-W-style RP2350A — this is the full 80-pin variant with 48 GPIOs and 8 ADC channels

Files in this folder

Component summary (from BOM + CPL)

Perimeter contact map (MC1..MC62)

Verified against the KiCad schematic and PCB netlist; matches /home/adom/project/rp2350b_rm2_pinmap.md (which is itself derived from this project). Reproduced here for self-contained reference.

RP2350B die pins not routed to any MC: 5, 10, 15, 24, 29, 32, 41, 50, 51, 59, 60, 62, 64, 65, 68, 69, 76 (GND / +3V3 / +1V1 power), 30/31 (crystal), 61/63 (VREG), 66/67 (USB D−/D+ internal — reach MC26/MC27 through R7/R8/R3), 70–75 (QSPI flash/PSRAM bus to U3/U5).

Radio wiring (U9 — RM2 / CYW43439) ← most important new detail

The RM2 module uses the gSPI 3-wire protocol: one bidirectional data line, a clock, a chip-select, and a power-enable. Host-wake and module-response arrive back on the same data line.

The critical "single-GPIO radio" trick: R40 (470 Ω) ties the module's POCI back onto the same trace as PICO, and R41 (10 kΩ) weakly ties IRQ onto that same trace. The MCU drives GPIO29 when writing to the module, releases it (input) to read, and senses the IRQ as a level change on the same line. This is exactly the Pico-W convention and matches the CYW43 SDK driver's WL_DATA_OUT = WL_DATA_IN = WL_HOST_WAKE = <same pin> configuration.

Firmware CYW43 pin overrides (matches Caleb's working build):

add_compile_definitions(
    CYW43_DEFAULT_PIN_WL_REG_ON=26u
    CYW43_DEFAULT_PIN_WL_DATA_OUT=29u
    CYW43_DEFAULT_PIN_WL_DATA_IN=29u
    CYW43_DEFAULT_PIN_WL_HOST_WAKE=29u
    CYW43_DEFAULT_PIN_WL_CLOCK=28u
    CYW43_DEFAULT_PIN_WL_CS=27u
    CYW43_USES_VSYS_PIN=0
)

Power architecture

+5V (MC pad, USB VBUS or external)
 │
 ├─ L3 (470 Ω ferrite) ─ C9 4.7 µF ─→ +3V3 feed to U9 radio
 │
 └─ U100 AP2112K-3.3 (LDO, EN=LDO_EN pin) ─→ +3V3 rail
       │
       ├─ U1 VDDIO rails (pins 5, 10, 15, 24, 41, 50, 64, 68, 76)
       ├─ U3 W25Q128 flash VDD
       ├─ U5 APS6404 PSRAM VDD  *(DNP)*
       ├─ U9 VDDIO / VDDBAT (through L3)
       ├─ Pull-ups: QSPI_SS (R12), BOOT, RST, etc.
       └─ R6 1 k + D101 red (power LED)

+3V3 → U1 pin 69 (VREG_VIN) → internal buck →
       pin 63 VREG_LX ─ L1 3.3 µH ─ pin 61 VREG_AVDD → +1V1 core rail
       (C6, C7 4.7 µF on VREG_LX; C100 / C101 10 µF bulk)

• +5V enters on one of the MC pads (not labeled in the BOM table above — check PCB silk).
• LDO_EN (MC30) must be pulled high for the board to power up. Typical pattern: tie to +5V through R41 or similar pull-up on the carrier, or drive from an upstream host.
• The RP2350 internal buck SMPS runs from +3V3, uses L1/C6/C7 on VREG_LX/VREG_AVDD, and produces the core +1V1 itself. No external +1V1 supply is required.
• L3 ferrite bead isolates the radio's +3V3 from digital switching noise on the MCU's +3V3 — important for clean Wi-Fi TX.

QSPI bus (U1 → U3, optional U5)

• PSRAM is DNP on production boards (user confirmed 2026-04-17). Firmware must not assume PSRAM is available. The RP2350 SDK PICO_USE_PSRAM option should stay off.
• Flash is 16 MB (128 Mbit) W25Q128JV — significantly larger than the 4 MB on stock Pico 2 W, so XIP code / large firmware blobs (BHI360/BHI385 patches, look-up tables) fit without squeezing.

Delta vs existing project pin maps

Cross-checked against /home/adom/project/rp2350b_rm2_pinmap.md and /home/adom/project/MoleculePinMapping.md. Those files are accurate for MC1–MC62 contact numbering and silk labels, with one small caveat and several net-level details they don't cover:

In the existing docs:

• Full MC → GPIO table ✓ (matches the schematic)
• Radio-pin identification (GPIO26/27/28/29) ✓
• Boot/reset/USB/SWD contacts ✓
• Firmware board_config.h expectations ✓

Not in the existing docs, added here:

1. R40 (470 Ω) + R41 (10 kΩ) bridge topology that makes the single-wire gSPI work — POCI and IRQ tied back onto the GPIO29/RADIO_D net. Explains why WL_DATA_IN == WL_DATA_OUT == WL_HOST_WAKE in Caleb's firmware and confirms HOST_WAKE does not need a separate GPIO.
2. U9 B5 (WLON) and B6 (BTON) are both tied to GPIO26/RADIO_ON — one GPIO enables both Wi-Fi and Bluetooth rails. Firmware can't sequence them separately.
3. U5 APS6404L QSPI PSRAM (8 MB) is footprinted but DNP. Existing docs don't mention PSRAM at all. Important because (a) the schematic has FLASH2_SS as a real net even though no chip is soldered, and (b) a future populated revision would use FLASH2_SS as the PSRAM chip-select — code should not assume the net is NC.
4. U3 flash is W25Q128JV (16 MB) — the existing docs don't specify size. Matters for linker scripts and XIP layout.
5. L3 470 Ω ferrite bead on the radio's +3V3 feed — firmware/EMI detail that isn't in the pin map but is essential for understanding any Wi-Fi TX behavior.
6. L1 is labeled "3.3uF" in the BOM CSV but is physically an inductor (3.3 µH) for the RP2350 internal buck converter. A BOM typo — flagged here so nobody trusts it blindly.
7. MC54–MC57 are reserved silk positions with no footprint placed — BOM confirms these are absent. Existing docs noted "pad not placed"; this file confirms it matches the CPL.
8. RP2350B (80-pin) variant is confirmed — not the 60-pin RP2350A. All 48 GPIOs and 8 ADCs are routed out.
9. Internal +1V1 rail is generated by the RP2350's own buck converter (L1 / VREG_LX / VREG_AVDD), not an external regulator. Firmware doesn't need to enable an external +1V1 supply.
10. Silk pin Tx0 on MC23 and Rx1 on MC22 are the UART0 default pin pair, not just generic GPIO0/GPIO1 — handy for boot logging via stdio_uart.

Gotchas for firmware bring-up

• LDO_EN must be high or nothing runs. When you first power the bare molecule on a breadboard, remember to tie MC30 to +5 V (or a host GPIO that does).
• Do not enable PICO_USE_PSRAM. The PSRAM is DNP. Setting this will break the flash XIP at boot because the RP2350 boot ROM may try to probe FLASH2_SS.
• Do not assume WL_DATA_IN is a separate GPIO when porting CYW43 code that was written for a module with a 4-wire SPI — this board shares data/in/out/host-wake on GPIO29.
• GPIO26 gates both Wi-Fi and Bluetooth. Don't drop it while doing a Wi-Fi-only workflow expecting BT to stay up from a prior enable — it won't.
• USB differential pair is through 27 Ω series resistors (R7, R8) routed from die pins 66/67 out to MC26/MC27. That's standard but worth noting if you're adding ESD / CM choke downstream.
• 12 MHz crystal (Y1) matches the Pico SDK default; no custom PICO_XOSC_STARTUP_DELAY_MULTIPLIER needed.
• 4-layer board. If you respin the carrier, route the radio ground return on an adjacent layer — the RM2's RF performance is sensitive to return-path integrity under L3.
• The wiki page is a stub. If you want the rest of the team to find this information, the publish step is still outstanding — see "Publishing to the wiki" below.

Publishing to the wiki (TODO)

The page molecules/molecule-rp2350b-rm2-v1-106000 exists but has no body content, no photo annotations, no pin table, no BOM. The content of this README could be published there with:

adom-wiki page edit molecules/molecule-rp2350b-rm2-v1-106000 \
    --field content \
    --body-md /home/adom/project/bosch-sensortec-demo/hardware/molecule_rp2350b_rm2_v1/README.md

Before doing that, confirm discovery triggers with the project lead (current stub has none).