74HC138
100%
Suggest edit
Image generated by Eeschema-SVG A0 A0 1 1 A1 A1 2 2 A2 A2 3 3 ~{E0} ~{E0} 4 4 ~{E1} ~{E1} 5 5 E2 E2 6 6 VCC VCC 16 16 GND GND 8 8 ~{Y0} ~{Y0} 15 15 ~{Y1} ~{Y1} 14 14 ~{Y2} ~{Y2} 13 13 ~{Y3} ~{Y3} 12 12 ~{Y4} ~{Y4} 11 11 ~{Y5} ~{Y5} 10 10 ~{Y6} ~{Y6} 9 9 ~{Y7} ~{Y7} 7 7
Pins16
DatasheetPDF
Desc3-to-8 line decoder/multiplexer inverting, DIP-16/SOIC-16/SSOP-16
X: 0.00   Y: 0.00 mm